1. Field of the Invention
The present invention relates to a insulated-gate semiconductor element using a silicon carbide substrate, and more particularly, to a vertical insulated-gate semiconductor element having a so-called trench structure. Furthermore, the present invention relates to a method for manufacturing such an insulated-gate semiconductor element.
2. Description of the Prior Art
In insulated-gate semiconductor elements using silicon carbide, the surface of a silicon carbide substrate is oxidized to form a silicon oxide film (oxide film), which is used as a gate insulator. Vertical silicon carbide insulated-gate semiconductor elements with a trench structure have been developed as high-power elements having high breakdown voltage and large current capacities.
FIG. 5 shows a cross section of a conventional vertical silicon carbide insulated-gate semiconductor element. This semiconductor element is made using a silicon carbide substrate as shown in FIG. 6. For this silicon carbide substrate, an n-type epitaxial layer 102 and a p-type epitaxial layer 103 are formed by CVD on top of a conductive n.sup.+ -type substrate 101 of silicon carbide. On the surface of this substrate, an n.sup.+ -layer 104 is partially formed by local ion implantation and annealing. As a result, a layered structure of n.sup.+ /p/n is formed in that order from the surface in the silicon carbide substrate. To obtain the trench structure by photo-lithography and etching from the surface of the substrate, a concave portion 105 is formed in this layered structure.
A silicon oxide film (oxide film) 110 is formed by oxidation on the substrate. The oxide film 110 is etched and removed except at side surfaces 111 of the concave portion (i.e. wall surfaces of the trench structure), a bottom surface 109 of the concave portion (i.e. the bottom surface of the trench structure), and a substrate surface 106 near the concave portion. A gate electrode 112 and an insulating film 116 are formed on top of the oxide film 110. Then, a source electrode 113 and a drain electrode 114 are formed on the two surfaces of the substrate 101. The channel 115, which is switched on and off by applying a voltage to the gate electrode 12, is formed at the interface between the p-type epitaxial layer 103 and the oxide layer 110.
This conventional technique is described, for example, in Silicon Carbide; A Review of Fundamental Questions and Applications, edited by W. J. Choyke, H. Matsunami, and G. Pensl, Akademie Verlag, 1997, Vol. II, pp. 369-388.
Silicon carbide has different oxidation speeds depending on the crystal orientation. For example, the (0001) Si-face of .alpha.-SiC has the slowest oxidation speed, whereas the (0001) C-face of .alpha.-SiC attained by rotation for 180.degree. has the highest oxidation speed. Therefore, when the concave portion is formed and the substrate including surfaces corresponding to several different crystal orientations is oxidized, the thicknesses of the formed oxide films will be different. When the thickness of the oxide film is not uniform throughout the trench structure, the electric field created in the oxide film depending on the voltage applied to the gate electrode also will be not uniform.
When the surface of the silicon carbide substrate is the (0001) Si-face of .alpha.-SiC, an epitaxial layer with superior crystallinity can be obtained. However, when an insulated-gate semiconductor element is made using this surface, a relatively thin oxide film 110 is formed on the substrate surface 106 and the trench bottom surface 109, and a relatively thick oxide film 110 is formed on the trench wall surfaces 111, as shown in FIG. 5. In this situation, the electric field applied to the oxide film on the trench bottom surface 109 is larger than the electric field applied to the channel portion 115 of the trench wall surfaces 111. Therefore, if an oxide film of the necessary thickness to maintain the breakdown voltage is formed on the trench bottom surface, an even thicker oxide film will be formed near the channel 115, which results in the problem that the response efficiency of the element with regard to the gate voltage is inferior.
If, on the other hand, the thickness of the oxide film 110 at the trench wall surfaces 111 is adjusted in consideration of the response time of the element, then the oxide film 110 at the trench bottom surface 109 becomes thin, and the breakdown voltage of the element decreases.
To make such an element using the (0001) C-face of .alpha.-SiC, a thick silicon oxide film is formed on the surface of the silicon carbide substrate and the trench bottom surface, and a thin silicon oxide film is formed on the trench wall surfaces. Such an insulated-gate semiconductor element is superior with regard to the distribution of the silicon oxide insulating film thickness, but the crystallinity of the epitaxial layer is inferior to that of an epitaxial layer formed on the (0001) Si-face of .alpha.-SiC. Therefore, it cannot provide a semiconductor element with suitable properties.
Thus, with conventional insulated-gate semiconductor elements, it has been a problem to increase the breakdown voltage while maintaining good semiconductor element properties.